The Trianus system is a suite of tightly integrated tools for the efficient design and implementation of digital circuits. The system has been optimized for fast iterative and incremental design, a feature we consider important when designing circuits with FPGAs. Trianus is based on an architecture-independent generic framework for circuit design and comprises a compiler for the Lola hardware description language, a layout editor framework, and a circuit checker based on binary decision diagrams. To date, two back-ends have been implemented: a back-end for a schema editor and a back-end for the Xilinx XC6200 FPGA. The XC6200 back-end (called Hades) consists of a layout editor, a technology mapper, a placer, a router, a bit-stream generator and loader, and a circuit extractor. A timing analyzer and an Xilinx XACTStep Series 6000 configuration file (CFG) converter is included. Further Trianus back-ends are planned.