Accelerating List Management for MPI
Keith D. Underwood, Arun Rodrigues, K. Scott Hemmert
IEEE International Conference on Cluster Computing (Cluster 2005)
Boston, Massachusetts, USA, September 27 - 30, 2005
Abstract
The latency and throughput of MPI messages are critically important to a range of parallel scientific applications. In many modern networks, both of these performance characteristics are largely driven by the performance of a processor on the network interface. Because of the semantics of MPI, this embedded processor is forced to traverse a linked list of posted each time a messages is received. As this list grows long, the latency of message reception grows and the throughput of MPI messages decreases. This paper presents a novel hardware feature to handle list management functions on a network interface. By moving functions such as list insertion, list traversal, and list deletion to the hardware unit, latencies are decreased by up to 20\% in the zero length queue case with dramatic improvements in the presence of long queues. Similarly, the throughput is increased by up to 10\% in the zero length queue case and by nearly 100\% in the presence queues of 30 messages.